by Team Declaration | Mar 4, 2021 | Press Release
Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has added more than 60 new HDL rules to ALINT-PRO™’s DO-254 rules plug-in and has made several enhancements to the tool’s Design Entry capabilities to...
by Team Declaration | Mar 1, 2021 | Press Release
Inseto, a leading technical distributor of equipment and materials, has supplied Custom Interconnect Limited (CIL) with a Kulicke & Soffa Asterion large diameter wire / ribbon wedge bonder for use in the production of wide bandgap (WBG) semiconductor-based power...
by Team Declaration | Feb 22, 2021 | Article
View this article as a pdf The RISC-V ISA has seen much adoption thanks to its customizable architecture and open-source business model. Naturally, the open-source ISA is also producing new open-source cores that target certain applications. If you are planning to...
by Team Declaration | Feb 16, 2021 | Engineering Marketing, Marketing Communications, Press Communications
In all advanced engineering sectors, trade press communications continues to be an essential aspect of marketing and public relations (PR) – despite the increased use of social media platforms. The traditional role of PR professionals is to raise awareness of a...
by Team Declaration | Jan 20, 2021 | Press Release
Aldec’s Active-HDL™ enables FPGA designers to take full advantage of the many features within the latest revision to VHDL and helps improve design verification efficiency. Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for...
