Aldec Adds UVM Generator to Riviera-PRO™

Aldec Adds UVM Generator to Riviera-PRO™

Productivity Through Methodology: Aldec Adds UVM Generator to Riviera-PRO™ Plus Updates Its OSVVM and UVVM Libraries Henderson, NV – November 16, 2021 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA, ASIC and SoC...